In the VLSI logic synthesis, high-performance CAD systems have various commands corresponding to various algorithms. These systems enable designers to synthesize the optimal circuit by repeatedly selecting and invoking the most appropriate-looking command. However they are hard for novice users to operate because it takes experience to select the command. In the past, the novices use a Simple Optimization Command (SOC) to automate command invocation. Although, it has the problem to maintain its heuristics up to date and lacks the automatic consideration of deadline time.