Scalability Issues in Evolutionary Synthesis of Electronic Circuits: Lessons Learned and Challenges Ahead

Computational Synthesis: From Basic Building Blocks to High Level Functionality

Volume

Papers from the 2003 AAAI Spring Symposium

Contents

This paper describes scalability issues of Evolutionarydriven automatic synthesis of electronic circuits. The article begins by reviewing the concepts of circuit evolution and discussing the limitations of this technique when trying to achieve more complex systems. The paper continues by describing techniques developed by the authors to partially overcome the limitations of evolution, such as the use of domain knowledge, design re-use and the development of hardware accelerators, such as stand-alone board-level evolvable system (SABLES), which was built to speed up the evolutionary design of electronic circuits. We also propose new directions of research that address scalability, such as: 1) evolutionary compilation of descriptions from behavioral Hardware Description languages (HDL) to structural HDL (for both the case of digital and analog/mixed signal) 2) evolutionary synthesis, converting from synthesizable analog HDL to circuits and 3) hardware-software partitioning (co-design) for CPU/FPGA hybrids.