Daryl Allred, Yossi Lichtenstein, Chris Preist, Mike Bennett, and Ajay Gupta
pa-risc is Hewlett-Packard’s (HP) reduced instruction set computer (risc) architecture that is used in its high-performance computer systems (Mahon et al. 1986). Implementations of this architecture have produced some of the most complex processor boards that HP makes (Robinson et al. 1987; Gassman et al. 1987): They can contain as many as 8 very large scale integrated (vlsi) chips--most of them custom, from central processing units to bus controllers to floating-point processors--several high-speed random-access memory arrays, one or more high-speed buses with over 100 lines, and many other components. In large part because of this complexity, the testing of pa-risc processor boards became a bottleneck, resulting in an undesirable backlog of undiagnosed boards, growing at a rate of 10 percent each month.